vivado 物理约束KEEP_HIERARCHY

KEEP_HIERARCHY

Applied To

Cells

Constraint Values

• TRUE

• FALSE

• YES

• NO

UCF Example

INST u1 KEEP_HIERARCHY = TRUE;

XDC Example

set_property DONT_TOUCH true [get_cells u1]

IOB

Applied To

Cells

Constraint Values

IOB_XnYn

UCF Example

INST ib[0] LOC = IOB_X0Y341;

XDC Example

set_property LOC IOB_X0Y341 [get_cells ib[0]]

IN_FIFO

Applied To

Cells

Constraint Values

IN_FIFO_XnYn

UCF Example

INST infifo_inst LOC = IN_FIFO_X0Y24;

XDC Example

set_property LOC IN_FIFO_X0Y24 [get_cells

infifo_inst]

OUT_FIFO

Applied To

Cells

Constraint Values

OUT_FIFO_XnYn

UCF Example

INST outfifo_inst LOC = OUT_FIFO_X0Y24;

XDC Example

set_property LOC OUT_FIFO_X0Y24 [get_cells

outfifo_inst]

ILOGIC

Applied To

Cells

Constraint Values

ILOGIC_XnYn

UCF Example

INST ireg LOC = ILOGIC_X0Y76;

XDC Example

set_property LOC ILOGIC_X0Y76 [get_cells ireg]

OLOGIC

Applied To

Cells

Constraint Values

OLOGIC_XnYn

UCF Example

INST oreg LOC = OLOGIC_X0Y76

XDC Example

set_property LOC OLOGIC_X0Y76 [get_cells oreg]

IDELAY

Applied To

Cells

Constraint Values

IDELAY_XnYn

UCF Example

INST idelay0 LOC = IDELAY_X0Y21;

XDC Example

set_property LOC IDELAY_X0Y21 [get_cells

idelay0]

IDELAYCTRL

Applied To

Cells

Constraint Values

IDELAYCTRL_XnYn

UCF Example

INST idelayctrl0 LOC = IDELAYCTRL_X0Y0;

XDC Example

set_property LOC IDELAYCTRL_X0Y0 [get_cells

idelayctrl0]

BEL

A5LUT, B5LUT, C5LUT, D5LUT

Applied To

Cells

Constraint Values

A5LUT, B5LUT, C5LUT, D5LUT

UCF Example

INST a0 BEL = A5LUT;

XDC Example

set_property BEL A5LUT [get_cells a0]

A6LUT, B6LUT, C6LUT, D6LUT

Applied To

Cells

Constraint Values

A6LUT, B6LUT, C6LUT, D6LUT

UCF Example

INST a0 BEL = D6LUT;

XDC Example

set_property BEL D6LUT [get_cells a0]

AFF, BFF, CFF, DFF

Applied To

Cells

Constraint Values

AFF, BFF, CFF, DFF

UCF Example

INST a_reg[0] BEL = CFF;

XDC Example

set_property BEL CFF [get_cells a_reg[0]]

A5FF, B5FF, C5FF, D5FF

Applied To

Cells

Constraint Values

A5FF, B5FF, C5FF, D5FF

UCF Example

INST a_reg[0] BEL = B5FF;

XDC Example

set_property BEL B5FF [get_cells a_reg[0]]

F7AMUX, F7BMUX

Applied To

Cells

Constraint Values

F7AMUX, F7BMUX

UCF Example

INST m0 BEL = F7BMUX;

XDC Example

set_property BEL F7BMUX [get_cells m0]

IOB

TRUE

Applied To

FF cells

Constraint Values

TRUE

UCF Example

INST a1_reg[*] IOB = TRUE;

XDC Example

set_property IOB TRUE [get_ports

DataOut_pad[*]]

TIP: XDC example 1, above, puts the property on the port itself and causes the flop that drives the IO

buffer to be placed inside the pad.

FALSE

Applied To

FF cells

Constraint Values

FALSE

UCF Example

INST b1_reg[*] IOB = FORCE;

XDC Example

set_property IOB TRUE [get_cells a1_reg[*]]

FORCE

Applied To

FF cells

Constraint Values

FORCE

UCF Example

INST q_reg[*] IOB = FALSE;

XDC Example

set_property IOB TRUE [get_cells q_reg[*]]

Note : The Vivado Design Suite does not support this

constraint in XDC. Use TRUE instead.

H_SET

Applied To

Cells

Constraint Values

Tool-generated string

UCF Example

N/A

XDC Example

N/A

Note : For more information, see Relative Location (RLOC) in

the Constraints Guide (UG625). In the Vivado Design Suite,

H_SET cells have a property called RPM.

U_SET

Applied To

Cells

Constraint Values

String

UCF Example

INST u0 U_SET = h0; (usually set in UCF)

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

U_SET must be placed in HDL code as an attribute.

For more information, see Relative Location (RLOC) in the

Constraints Guide (UG625).

RLOC

Applied To

Cells

Constraint Values

XnYn

UCF Example

INST u0 RLOC = X2Y1;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

RLOC must be placed in HDL code as an attribute.

For more information, see Relative Location (RLOC) in the

Constraints Guide (UG625).

RLOC_ORIGIN

Applied To

Cells

Constraint Values

XnYn

UCF Example

INST u0 RLOC_ORIGIN = X144Y255;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

RLOC_ORIGIN must be placed in HDL code as an attribute.

For more information, see Relative Location (RLOC) in the

Constraints Guide (UG625).

RPM_GRID

Applied To

Cells

Constraint Values

GRID

UCF Example

INST u0 RPM_GRID = GRID;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

RPM_GRID must be placed in HDL code as an attribute.

For more information, see Relative Location (RLOC) in the

Constraints Guide (UG625).

USE_RLOC

Applied To

Cells

Constraint Values

TRUE, FALSE

UCF Example

INST u0 USE_RLOC = FALSE;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

RLOC_RANGE

Applied To

Cells

Constraint Values

XnYn:XnYn

UCF Example

INST u0 RLOC_RANGE = X1Y1:X3Y3;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

Create a Pblock with the desired range, and add the RPM

cells to the Pblock .

BLKNM

Applied To

Cells

Constraint Values

String

UCF Example

INST u0 BLKNM = blk0;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

HBLKNM

Applied To

Cells, Nets

Constraint Values

String

UCF Example

INST u0 HBLKNM = blk0;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

XBLKNM

Applied To

Cells, Nets

Constraint Values

String

UCF Example

INST u0 XBLKNM = blk0;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.

Use BEL PROHIBIT to keep out unrelated logic.

HLUTNM

Applied To

LUT cells

Constraint Values

String

UCF Example

UCF is not allowed, only HDL.

XDC Example

set_property HLUTNM h0 [get_cells {LUT0 LUT1}]

LUTNM

Applied To

LUT cells

Constraint Values

String

UCF Example

UCF is not allowed, only HDL.

XDC Example

set_property LUTNM h0 [get_cells {LUT0 LUT1}]

USE_LUTNM

Applied To

LUT cells

Constraint Values

TRUE, FALSE

UCF Example

INST lut0 USE_LUTNM = FALSE;

XDC Example

The Vivado Design Suite does not support this constraint in

XDC.